银行

DataStage报错

跪求大家这个是什么错误,JOB编译报出来的错!   安装在WINDOWS环境下Output from transformer compilation follows:##I IIS-DSEE-TFCN-00001 22:41:37(000) IBM WebSphere DataStage Enterprise Edition 8.5.0.5746 Copyright (c) 2001, 2005-2008 IBM Corpora...显示全部
跪求大家这个是什么错误,JOB编译报出来的错!   安装在WINDOWS环境下
Output from transformer compilation follows:
##I IIS-DSEE-TFCN-00001 22:41:37(000)
IBM WebSphere DataStage Enterprise Edition 8.5.0.5746
Copyright (c) 2001, 2005-2008 IBM Corporation. All rights reserved


##I IIS-DSEE-TFCN-00006 22:41:37(001) conductor uname: -s=Windows_NT; -r=0; -v=6; -n=JIEKOU2420; -m=Pentium
##I IIS-DSEE-TOSH-00002 22:41:37(002) orchgeneral: loaded
##I IIS-DSEE-TOSH-00002 22:41:37(003) orchsort: loaded
##I IIS-DSEE-TOSH-00002 22:41:37(004) orchstats: loaded
##W IIS-DSEE-TOSH-00049 22:41:38(002) Parameter specified but not used in flow: DSPXWorkingDir
##E IIS-DSEE-TBLD-00076 22:41:39(000) Error when checking composite operator: Subprocess command failed with exit status 256.
##E IIS-DSEE-TFSR-00019 22:41:39(001) Could not check all operators because of previous error(s)
##W IIS-DSEE-TFTM-00012 22:41:39(002) Error when checking composite operator: The number of reject datasets "0" is less than the number of input datasets "1".
##I IIS-DSEE-TBLD-00079 22:41:39(003) Error when checking composite operator: cxx  -O   -ID:/IBM/InformationServer/Server/PXEngine/include -W/TP -W/EHa -DAPT_USE_ANSI_IOSTREAMS -c -W/Zc:wchar_t- D:/IBM/InformationServer/Server/Projects/cdfg/RT_BP46.O/V0S68_T_DF_PROJECTSUPPLY_F_Transformer_68.C -o D:/IBM/InformationServer/Server/Projects/cdfg/RT_BP46.O/V0S68_T_DF_PROJECTSUPPLY_F_Transformer_68.tmp.o.
##I IIS-DSEE-TBLD-00000 22:41:39(004) Error when checking composite operator: Output from subprocess: Compiler "cl" not found.
##E IIS-DSEE-TCOS-00029 22:41:39(005) Creation of a step finished with status = FAILED. (T_DF_PROJECTSUPPLY_F.Transformer_68)
*** Internal Generated Transformer Code follows:
0001: //
0002: // Generated file to implement the V0S68_T_DF_PROJECTSUPPLY_F_Transformer_68 transform operator.
0003: //
0004:
0005: // define our input/output link names
0006: inputname 0 DSLink72;
0007: outputname 0 DSLink5;
0008:
0009: initialize {
0010:  // define our control variables
0011:  int8 RowRejected0;
0012:  int8 NullSetVar0;
0013:
0014: }
0015:
0016: mainloop {
0017:
0018:  // initialise the rejected row variable
0019:  RowRejected0 = 1;
0020:
0021:  // evaluate columns (no constraints) for link: DSLink5
0022:  DSLink5.ETL_TIME = current_date();
0023:  writerecord 0;
0024:  RowRejected0 = 0;
0025: }
0026:
0027: finish {
0028: }
0029:
*** End of Internal Generated Transformer Code收起
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飞天磊飞天磊软件开发工程师pactera
安装了VC++ 6.0
银行 · 2012-03-26
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