1同行回答
AES也被称为 Rijndael。它是作为电子数据的加密标准而建立的，由美国国立标准与技术研究院 (NIST) 于 2001 年建立。它是处理 16 字节/128 位的数据块的对称密钥算法。换句话说，它是一种数据块加密算法。128 位数据块适用于 128 位寄存器。此算法的密钥可以是 128、192 或 256 位长。POWER8 架构使您能够用 5 个指令实现 AES 算法，在 AES 算法核心（尤其是扩展密钥和围绕部分算法的 AES 加密/解密）中运行关键步骤。
POWER8 核心加密-介绍如何使用 AES 指令
https://www.ibm.com/developerworks/cn/aix/se-power8-in-core-cryptography/index.html
OpenSSL已经引入且为OpenSSH所采用的。ssh 的Ciphers 采用 aes128-gcm@openssh.com算法即可利用Power8的片内加速。
https://github.com/openssl/openssl/blob/1aa89a7a3afb053d0c0b7fad8d3ea1b0a5447289/crypto/aes/asm/aesp8-ppc.pl
This module implements support for AES instructions as per PowerISA
specification version 2.07, first implemented by POWER8 processor.
The module is endian-agnostic in sense that it supports both big-
and little-endian cases. Data alignment in parallelizable modes is
handled with VSX loads and stores, which implies MSR.VSX flag being
set. It should also be noted that ISA specification doesn't prohibit
alignment exceptions for these instructions on page boundaries.
Initially alignment was handled in pure AltiVec/VMX way [when data
is aligned programmatically, which in turn guarantees exception-
free execution], but it turned to hamper performance when vcipher
instructions are interleaved. It's reckoned that eventual
misalignment penalties at page boundaries are in average lower
than additional overhead in pure AltiVec approach.